3
Plasma Processing In The Electronics Industry

The electronics industry is the modern ''toolmaker'' for the world economy and as such helps to generate jobs and improve productivity in most other industries. Automobiles, airplanes, telephones, dishwashers, and microwave ovens, to name but a few products, all have electronic components. The sophistication of our national defense relies on electronic components to provide missile guidance, antimissile defense, pinpoint bombing accuracy, and range finding, again to name but a few applications. In 1987 the U.S. electronics and telecommunications industries combined employed more people domestically (2,401,000) than did any other U.S. manufacturing industry. In fact, these industries provided nearly as many domestic manufacturing jobs in 1987 as did the metals (629,000), automobile (963,000), and aerospace (835,000) industries combined (see Materials Science and Engineering for the 1990s). Since 1976, the electronics industry has accounted for one of every eight manufacturing jobs in the United States. In 1990, total sales of electronics products reached $750 billion worldwide (Figure 3.1).

Figure 3.1 World electronics food chain (adapted from the National Advisory Committee on Semiconductors report,  Preserving the Vital Base, Arlington, Va., July 1990). Although revenues are a small portion of the world  electronics market, plasma technology is a critical component on which the industry rests. The electronics,  semiconductor, materials, and equipment industries are all expected to double in the next 5 years. The  plasma equipment industry is expected to keep pace with this trend.



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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges 3 Plasma Processing In The Electronics Industry The electronics industry is the modern ''toolmaker'' for the world economy and as such helps to generate jobs and improve productivity in most other industries. Automobiles, airplanes, telephones, dishwashers, and microwave ovens, to name but a few products, all have electronic components. The sophistication of our national defense relies on electronic components to provide missile guidance, antimissile defense, pinpoint bombing accuracy, and range finding, again to name but a few applications. In 1987 the U.S. electronics and telecommunications industries combined employed more people domestically (2,401,000) than did any other U.S. manufacturing industry. In fact, these industries provided nearly as many domestic manufacturing jobs in 1987 as did the metals (629,000), automobile (963,000), and aerospace (835,000) industries combined (see Materials Science and Engineering for the 1990s). Since 1976, the electronics industry has accounted for one of every eight manufacturing jobs in the United States. In 1990, total sales of electronics products reached $750 billion worldwide (Figure 3.1). Figure 3.1 World electronics food chain (adapted from the National Advisory Committee on Semiconductors report,  Preserving the Vital Base, Arlington, Va., July 1990). Although revenues are a small portion of the world  electronics market, plasma technology is a critical component on which the industry rests. The electronics,  semiconductor, materials, and equipment industries are all expected to double in the next 5 years. The  plasma equipment industry is expected to keep pace with this trend.

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Figure 3.2 This trench etch (0.2 µm wide by 4 µm deep) in single crystalline silicon shows the extraordinary capabilities of plasma processing. Such trenches are used primarily for device isolation and charge storage capacitors in memory devices. Only with plasmas can such features be fabricated economically. (Courtesy of Applied Materials, Inc.) Figure 3.3 Schematic illustration of the difference between plasma (dry) and wet etching. Only plasma etching provides the needed anisotropic etching and high-fidelity pattern-transfer capability. Feeding the electronics industry is the semiconductor industry, which had sales worldwide of $50 billion in 1990. Semiconductors are used in the fabrication of microelectronic integrated circuits or chips that are the principal components of electronic and telecommunication systems. Despite overall market growth, the United States consistently lost semiconductor market share throughout the 1980s and is expected to continue losing market share through the mid-1990s. In the world's largest semiconductor market—Japan—the United States has only a 10 percent share. Yet Japan has increased its U.S. market share from 5 to 30 percent since 1980. Feeding the semiconductor industry is the equipment and materials industry, which had sales worldwide of $19 billion in 1990 (Figure 3.1). The ability to make large volumes of low-cost semiconductors depends directly on the quality of manufacturing equipment and materials. Plasma equipment and plasma processing are critical constituents in the equipment and materials industry. In fact, the microelectronics industry would not exist as we know it today were it not for plasma processing. For example, in the fabrication of 1-megabit dynamic random access memories (DRAMs), plasmas are used to "dry" etch patterns with vertical sidewalls and high aspect ratios (depth/width) into materials such as silicon, silicon dioxide, and aluminum. An example of a 0.2-mm-wide by 4-mm-deep (aspect ratio of 20) trench plasma etched in single crystalline silicon is shown in Figure 3.2. To obtain high-density packing of microscopic circuit components, such anisotropic etching is essential. By contrast, wet chemical techniques used previously result in isotropic etching, where both vertical and lateral etch rates are comparable. As illustrated in Figure 3.3, only

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges plasma etching can be used when aspect ratios approach or exceed 1; otherwise, the patterns to be transferred would be destroyed. Plasmas are also essential for depositing thin layers of dielectric materials, such as silicon dioxide and silicon nitride, that are used for insulation between conducting films and encapsulation of finished circuits to protect them from moisture and contamination. These films must be deposited at temperatures low enough so that the delicate circuit structure is not destroyed. Plasmas are also finding increasing usage in low-temperature cleaning of semiconductors and in other electronics applications, such as chip packaging and circuit board fabrication. The primary use of plasmas in the electronics industry is in semiconductor chip manufacturing. In a typical semiconductor chip factory today, up to 30 percent of the equipment is plasma-based. As shown in Figure 3.4, device dimensions have consistently shrunk with time as technology has incrementally evolved. Besides finer device dimensions, another trend is to make use of stacked layers of materials for interconnection between devices: current devices make use of three levels of metals and insulators, whereas next-generation devices will use four, five, and six levels. These trends place increased demands and increased reliance on plasma processes for high-fidelity pattern transfer, low-temperature deposition, and gaseous cleaning. For example, in the fabrication of the interconnection structure, plasmas are used for deposition of dielectrics and metals, for etching contact windows and conducting patterns, and for cleaning surfaces between each of these steps. Just considering etching, the number of plasma steps more than doubled between the 4- and 16-megabit DRAM chip generations (Figure 3.5). As a result, the worldwide market for plasma etching and deposition equipment is rapidly expanding. In 1990, worldwide sales were about $1 billion, and by 1995 this should double in concert with the rest of the electronics, semiconductor, equipment, and materials industries (see Figure 3.1). Figure 3.4 Increased level of integration and shrinking dimensions for integrated circuitry as  a function of time. Such trends place both increasing demands and increasing  reliance on plasma processing. (Adapted, by permission, from R. B. Fair, 1990,  "Challenges to Manufacturing Submicron, Ultra-Large Scale Integrated Circuits,"  Proc. IEEE 78, 1687. Copyright © 1990 by IEEE.)

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Figure 3.5 The trend toward increasing dry etch complexity, hence increasing  use of plasma equipment, as the level of integration in memory chips  increases. (Reprinted, by permission, from A. S. Bergendahl, D. V.  Horak, P. E. Bakeman, and D. J. Miller, 1990, Cluster Tools, Part 2:  16Mb DRAM Processing, Semiconductor International, September, p. 94.  Copyright © 1990 by Cahners Publishing Company.) Figure 3.6 As illustrated for plasma etching alone, the United States dominates the world market in  plasma process equipment but has steadily lost market share. This trend will likely continue  as a result of Japanese ownership of the semiconductor market and the strong coupling  between chip manufacturers and plasma equipment vendors in Japan. (Source of data for  1985 and 1989: Dataquest Newsletter, "U.S. Companies Dominate the Dry Etch Market,  but Face New Challenges in the 1990s," September 1990, p. 1. The panel's projection to  1993 was obtained by linearly extrapolating from the 1985 and 1989 data. This extrapolation  has been calibrated using similar data from earlier years.)

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Figure 3.7 The market trend for dry etching equipment sold in Japan shows a clear trend toward increasing use of electron cyclotron resonance (ECR) plasmas. The primary vendors of such plasma equipment are Japanese companies such as Hitachi and Sumitomo. (Adapted from Nikkei Microdevices, May 1990, Nikkei Business Publications, Inc., Tokyo.) Despite owning the majority of the plasma equipment market, the United States steadily lost market share during the 1980s. The trend projected by the panel for market share in plasma etching equipment is shown in Figure 3.6. During the 1980s, Perkin-Elmer, a former U.S. leader, dropped out of this field, and Materials Research Corporation (MRC), a former U.S. company, is now Japanese owned. There are perhaps many reasons for the declining U.S. market share in plasma processing equipment, but the fact that Japan is the largest market for semiconductor process equipment is perhaps foremost among them. Japan has also led in the development of advanced, electron cyclotron resonance (ECR) systems. For example, Hitachi and Sumitomo have substantially bolstered their market positions in recent years by supplying ECR etching and deposition equipment to Japanese semiconductor manufacturers (Figure 3.7). The plasma equipment industry at first glance appears to be composed of many small companies. This is true for the United States, where semiconductor processing equipment suppliers are typically not aligned with large domestic chip manufacturers. As a result, research and development (R&D) funding for next-generation processing equipment is strained at a time when plasma equipment must quickly become more sophisticated to meet the challenges of next-generation devices. The total cost of wafers needed for a comprehensive equipment testing and evaluation program is estimated to be a daunting $600,000. Essentially no resources are available to generate fundamental understanding and data bases with which reactors and processes can be designed. New reactors and processes are developed solely by empirical means.

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Figure 3.8 Trend in use of larger wafer slices for integrated circuit fabrication. Such trends place new demands on plasma reactor design and will likely lead to large development costs, since fundamental scaling laws that relate processes in small plasma reactors to those in large plasma reactors do not exist. (Adapted, by permission, from P. K. Chatterjee, 1991, "From VLSI to ULSI: The Subhalf-Micron Challenge," Proc. SPIE, 1392, 2. Copyright © 1991 by the Society of Photo-Optical Instrumentation Engineers.) By contrast, most equipment development in Japan occurs by collaboration between chip manufacturers and equipment vendors. For example, data on process characterization and device yield are provided to the Hitachi equipment group by the Hitachi semiconductor group. NEC semiconductor groups have played a key role in developing the equipment for the Anelva ECR plasma system announced in 1990. SEMATECH recognized the inability of independent companies in the U.S. equipment industry to invest in the industry's future and has begun to provide engineering support to equipment and materials suppliers (SEMATECH Annual Report 1989). However, SEMATECH's R&D efforts are largely focused on short-term improvements and do not adequately address long-term needs of the industry. In particular, they have placed little or no effort on plasma reactor design or plasma process simulation. MICROELECTRONICS FABRICATION Microelectronic devices are complex structures formed on the surface of a semiconductor wafer. Today's integrated circuits are composed of many millions of transistors that are microscopically wired together to form a circuit that covers an area of about 1 cm2. Several hundred chips are simultaneously fabricated on a 125- or 150-mm-diameter silicon semiconductor wafer. The wafer is then diced to separate individual chips that are packaged for installation on printed circuit boards for use in electronic systems such as computers, televisions, microwave ovens, automobiles, and aircraft. As we enter the 21st century, many billions of transistors will be incorporated into chips that are twice as large and fabricated on 200- or even 300-mm-diameter wafers (Figure 3.8). The sizes of features that constitute the microscopic transistors are typically less than 1 micrometer, or about a hundredth the diameter of a human hair. This microstructure pattern is fabricated using subtractive processing, in which thin films are first deposited over the entire wafer surface and then removed selectively from only parts of the surface. Many steps in the subtractive patterning process already use plasmas, and in the future even more steps will use plasmas (see Figure 3.5).

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Consider the electrical wiring that connects transistors, capacitors, resistors, and other elements of the integrated circuit (Figure 3.9). The fabrication sequence consists of: Depositing a uniform metal layer (usually aluminum) over the entire surface (sputtering—a plasma process), Coating the surface with a photosensitive polymer or photoresist, Optically projecting a pattern onto the photoresist to alter the polymer's solubility, Dissolving the more soluble portions of photoresist to create a polymeric mask on the metal (plasma development is used occasionally now and will be used more often in the future), Etching the metal that is not protected by the mask (an essential plasma process), and finally Removing the mask (a plasma process). Plasmas are used in steps 1, 4, 5, and 6. Plasmas are also used in patterning the insulating layers and the underlying semiconductors. To fabricate such devices today, this sequence is repeated from 10 to 18 times. As we enter the 21st century, the number of steps and repetitions are likely to double, and plasma development of the resist will likely become routine. This complexity means that the yield on any single step must be much larger than 99 percent for the fabrication sequence to be economically viable. Today's processes are developed using a combination of intuition and statistical optimization. The intuition enters in the initial choice of gaseous, reactant precursors, and other process variables such as pressure, flow rate, power, and surface temperature. Of course, this intuition is based on fundamental understanding of plasma science, and the better our understanding, the better our intuition and the more rapidly we can develop new processes. Statistical methodologies (of which the Taguchi method is just one) provide prescriptions by which process variables are chosen with a minimum of experimentation. Interpolation schemes using functions of arbitrary form are then used to numerically determine "optimal" operating conditions that come closest to satisfying the specifications. This optimal space is then further explored experimentally with higher resolution to fine-tune the process. Such methodologies Figure 3.9 Subtractive processing scheme used in fabricating microelectronic integrated circuits. Steps 1, 5, and 6 routinely use plasma methods today; step 4 will  see increasing use of plasma in the future. (Adapted from W. C. Till  and J. T. Luxon, 1982, Integrated Circuits: Materials, Devices, and Fabrication, p. 259, by permission of Prentice-Hall, Inc., Englewood Cliffs, NJ 07632. Copyright © 1982 by Prentice-Hall.)

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Figure 3.10 Schematic illustration of two (of many) proposed mechanisms for anisotropic plasma etching. In the first case, ions create a damaged surface that is then more reactive toward neutral etchants. In the second case, ions help to desorb etch-inhibiting species from the surface. In both cases, ion transport must be preferentially normal to the surface so that only the etch rate of the bottom surface is enhanced. (After D. L. Flamm and V. M. Donnelly, 1981, "Design of Plasma Etching," Plasma Chemistry and Plasma Processing 1, 317. Reprinted by permission of Plenum Press). work best when the number of parameters and their ranges are most constrained: in other words, when the primary task is fine tuning. Only with insight based on fundamental understanding can we narrow the process variable space sufficiently and exploit statistical methodology for rapid process optimization. As we enter the 21st century, shrinking device dimensions and increased levels of integration will place greater and greater demands on plasma processing and its optimization. For example, processes under development today for manufacturing by 1994-1995 will require transfer of 0.35-µm-wide features with less than a 0.035-µm linewidth loss (50 atoms on each side). By the year 2000, 0.25-µm structures are expected to be in production, and 0.1-µm structures will be under development with even more stringent constraints on linewidth loss (see Figure 3.4). Etching and deposition processes must also be uniform to better than 1 percent over 200- to 300- mm diameter wafers by the year 2000. This uniformity is equivalent to a variation of approximately 20 atomic layers across a wafer for a 0.5-µm film thickness. This represents more than a 5-fold improvement over today's capabilities, which are limited by gaps in fundamental understanding. For example, we do not understand how the pattern itself influences etching and deposition rates. To attain these goals and meet future needs, greatly improved understanding and control of the processing are needed to shorten the development cycle time and reduce the development expense.

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges PLASMA ETCHING While previous generations of integrated circuits could be fabricated using wet, chemical etching techniques, the devices of today and the future cannot be made without using plasma etching to obtain the necessary pattern transfer fidelity (see Figure 3.3). For today's microtransistors, features such as gate electrodes or interconnection vias have widths that are comparable to the thin film thickness; therefore, to transfer the pattern with high fidelity, etching must be anisotropic, i.e., much faster perpendicular than parallel to the surface. The silicon trench shown in Figure 3.2, used to isolate transistors on the chip or store charge in a DRAM, illustrates the anisotropic capabilities provided by plasma etching. Linewidth losses of more than 10 percent cannot be tolerated if electronic devices are to operate as intended: for a 0.5-micron feature, that corresponds to less than 80 atomic layers on each side of the feature. In the laboratory, plasma processes have been used to etch features of only 200 atoms in width. However, the ability to control this etching reproducibly so that billions of features can be etched simultaneously on a 200-mm-diameter wafer with linewidth loss of less than 100 atoms is not currently achievable. The central issue in plasma etching is to control plasma process variables to obtain high anisotropy, high rates, and high uniformity over large areas without sacrificing selectivity or creating undue damage. Only by achieving such control can high-yield, high-volume, low-cost manufacturing be realized. Anisotropy The unique combination of reactive and charged species in the plasma permits rapid, large-area, anisotropic etching. Energetic ions enhance the reaction rate between active species in the plasma and the surface, clean the surface of etch-inhibiting or passivation layers, and stimulate desorption of volatile products. Illustrations of two of these anisotropic mechanisms are shown in Figure 3.10. The precise mechanisms for any given material system are not understood, but it is clear that the ions striking the surface must themselves be anisotropic, i.e., traveling preferentially in a direction perpendicular to the surface. Ions are oriented and accelerated in a nonneutral region, called the sheath, between the plasma and the device wafer (Figure 3.11). The properties of this sheath are incompletely understood and yet are of paramount importance in controlling the plasma etching process. Figure 3.11 Schematic illustration of a parallel-plate, diode plasma reactor. Reactant precursor molecules, ions, and electrons are created primarily in the low-field plasma region. Electrons and ions are accelerated either toward or away from the device surface by the electric field established in the nonneutral sheath that separates the plasma from the surface. This type of reactor has been used in manufacturing for many years and is still in use today.

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Figure 3.12 Schematic illustration of 0.25-µm poly-silicon/silicide gate structure used in metal-oxide-semiconductor field-effect transistors (a) before and (b) after anisotropic plasma etching. The gate oxide is only 80 angstroms thick and very sensitive to plasma-induced damage. Without planar geometry, over-etching is required to remove poly-silicon "stringers" near the field oxide isolating layer. (Adapted from J. M. Cook and K. G. Donohoe, 1991, "Etching Issues at 0.35 µm and Below, Solid State Technol. 34, 119. Reprinted with the permission of Solid State Technology.) Selectivity Material-selective etching is crucial for avoiding linewidth loss: ideally, the photoresist mask should not etch at all while the underlying film is being patterned. Similarly, after the film has been etched, the plasma ideally should not etch or alter the properties of the underlying thin film. Today, we do not understand the fundamental limits to selective etching in plasmas, but we do know that selectivity depends on both chemistry and charged particle bombardment. The same energetic bombardment that provides anisotropy in plasma etching tends to reduce selectivity, and a major challenge for the future will be to understand fundamental limits to both anisotropy and uniformity as a function of energetic particle bombardment. We do know that the selectivities we can achieve today are inadequate for fabricating the devices of tomorrow. For example, aluminum can be etched typically 2 to 4 times faster than photoresist today. In just a few years, we will need to etch aluminum at least 10 times faster than photoresist to meet linewidth-loss specifications. The ability, which we currently do not possess, to selectively etch similar materials (silicon nitride with respect to silicon dioxide; poly-silicon with respect to metal silicides; silicon with respect to germanium) will create opportunities for low-cost, large-volume, fabrication of new, high-performance electronic devices. Material selectivity in plasma etching is most demanding in etching gates for metal oxide semiconductor field-effect transistors (MOSFETs) where the gate oxide thickness will be less than 10 nanometers as device dimensions shrink. Consider the structure shown in Figure 3.12. Because of the topography, the silicide and poly-silicon layers must be over-etched to remove the "stringer" residue at the edge of the device, and selectivities for etching silicon or metal silicides with respect to silicon dioxide will have to be greater than 50 to 1 to maintain high yields. Uniformity Uniformity across a wafer must be maintained so that the underlying materials are not subjected to extended plasma exposure. The degree of uniformity required, therefore, depends

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Figure 3.13 The effect of trench aspect ratio (width/depth) on trench etching rate: higher-aspect-ratio trenches etch more slowly than do lower-aspect-ratio trenches. Such effects have only recently been discovered and are not well understood. Because of the different etching rates, longer over-etching times are required, and the device may be more susceptible to plasma-induced damage.  (Courtesy of D. J. Vitkavage and A. Kornblit, AT&T Bell Laboratories.) partly on the selectivity of the etch. For higher selectivity, more overetch can be tolerated to compensate for poor uniformity. However, because the plasma can also damage underlying films, overetching must still be minimized. For example, for the gate structure shown in Figure 3.12 the plasma treatment must be gentle enough not to damage the thin gate oxide or the gate oxide-silicon interface. While etching uniformity across a wafer can be engineered based on some knowledge of the fundamental science, nonuniformity on a microscopic scale is not well understood. For example, one of the reasons that there is not a single aluminum plasma etch process for all microelectronic devices is that the aluminum etching rate depends on the microscopic shape of the etched patterns. This problem is not unique to aluminum, and the trenches in Figure 3.13 illustrate how large-aspect-ratio trenches can etch more slowly than small-aspect-ratio trenches. This dependence was not appreciated until we entered the submicron etching realm in recent years. This sudden realization illustrates the potential problems that can occur as a result of incomplete fundamental understanding of etching processes. Ion bombardment, electron bombardment, reactive neutral flux, product desorption, and redeposition all appear to be important in determining the relative etch rates of trenches with different aspect ratios, and so a minimum physical understanding is needed to advance the technology. Damage Much work is needed to quantify plasma-process-induced device damage and relate it to processing conditions and reactor design. Plasma-induced damage can take many forms: ''shorts'' or "opens" created by particulate contamination; trapped interface charge; defects that migrate into bulk materials such as silicon or silicon dioxide; and mobile charge that alters the

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges deposition in an integrated process chamber called a cluster tool. Today's processes have been developed empirically and are often plagued by particulate contamination and imperfect planarization. As device dimensions shrink, the constraints placed on planarity become more stringent: surfaces must be flatter over larger areas with fewer particulates. Shrinking device dimensions coupled with higher aspect ratios also make filling of deep narrow trenches or spaces between conducting lines more difficult. As illustrated in Figure 3.14, voids are often created that affect device performance and create reliability problems. The conformality of the deposit and the filling of trenches and spaces can be controlled by changing plasma operating parameters. But, once again, the processes must be tediously developed by trial and error since we do not understand how plasma bombardment influences sticking probabilities or surface diffusion of deposition precursors. Surface Modification The use of polymeric interlayer dielectrics for both chip structures and chip packages helps reduce the interconnect capacitance, and thereby, increases system performance. A major problem with polymeric dielectrics, however, is poor adhesion to metal films. Empirically, plasmas have been found to help promote polymer-metal adhesion, but the fundamental mechanisms responsible are unknown. Quantitative work is needed that relates process variables to the chemical surface modification, and this surface modification to bonding strength. New Materials Arguably one of the greatest advantages of plasmas is their nonequilibrium nature that can be exploited in growing and depositing new materials. A sampling of such materials, how they might be applied, and which plasma methods are most promising is summarized in Table 3.1 and elaborated on below. Table 3.1 Plasma Growth and Deposition of New Electronic Materials Material Application Methoda Fluorinated polymers Interlevel dielectrics PECVD Diamond Heat sinks, transistors PECVD, TPCVD Silicon carbide Heat sinks, transistors PECVD, TPCVD High-temperature superconductors Interconnection, high speed Spray, sputter, TPCVD Compound semiconductors Photonic, high speed PECVD Nanocrystallites Data storage, photonic TPCVD, sputtering, PECVD Copperb Interconnection PECVD a PECVD denotes plasma-enhanced chemical vapor deposition (low pressure); TPCVD denotes thermal plasma chemical vapor deposition (high pressure). b Copper is currently not use in microelectronic devices.

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges In complex chips, circuit performance is often limited by the delay associated with the product of the resistance and capacitance of the interconnect "wiring." The capacitance can be reduced by using insulators with a lower dielectric constant than that of the silicon dioxide used today. Heavily fluorinated organic polymers are excellent candidates for such interlayer materials dielectrics and can be deposited using plasma methods. However, for each new deposition process, an empirical process development will be required because of our incomplete knowledge base. Because of high thermal conductivity and large band gap, diamond and silicon carbide microelectronic devices are promising for high-speed, high-temperature, radiation-hard electronic applications. Imagine electronic devices functioning at hundreds of degrees Celsius without the need for cooling. Low-cost, microelectronic-grade diamond and silicon carbide devices would revolutionize electronic system design. Both PECVD and thermal plasma chemical vapor deposition (TPCVD) have been used to deposit diamond and silicon carbide films. PECVD, in particular, is attractive for the deposition of thin, uniform films for microelectronic applications, while TPCVD shows promise for high-rate deposition of thick films useful for heat sinks. In TPCVD, the plasma is used to vaporize the stream of precursors while a cooled substrate is brought into contact with the plasma and nucleation occurs on the surface. Nonequilibrium conditions must be maintained in front of the substrate to avoid homogeneous nucleation in the boundary layer. Compared to conventional vapor-phase deposition techniques, the high energy density of the thermal plasma allows higher throughputs and higher film-growth rates. At the same time, much of the coating quality that can be obtained with low-pressure chemical vapor deposition and PECVD processes is also obtained with this deposition process. Further development of TPCVD is needed to enable uniform, reproducible coating of large areas with good adhesion. Effective means of depositing high-temperature superconductors have been sputtering, plasma spraying, and TPCVD. Applications of high-temperature superconductors in microelectronics might include improvement of conventional devices by replacing metal interconnects and reducing circuit delay time and fabrication of Josephson junction logic devices to replace conventional transistor logic and achieve enhancements in computational performance. Much work must still be done to optimize the deposition methods and produce films with desired properties. PECVD of compound semiconductors is another area of active research and promise. These materials are used in heterojunction and superlattice devices, and many of the quantum mechanical devices of the next century will require deposition of compound semiconductors. Plasmas offer rapid, large-area deposition capabilities, but films so far have been of relatively low quality when compared to those prepared by chemical vapor deposition or molecular beam epitaxy. Low-temperature deposition of these materials has generally been plagued by poor surface morphology and contamination. The first teams to overcome these problems by tailoring plasma parameters such as ion flux and bombardment energy and possibly by using pulsed plasma techniques will achieve leading positions in manufacturing and patents. The properties of materials with phase structures on a nanometer scale (nanocrystalline) are different from those of normally available single-crystal, polycrystal, or amorphous materials because their aggregate atomic structure is unique. In nanocrystalline materials a significant fraction of the atoms are in grain boundary regions and thus experience a different atomic environment than in the bulk. In comparison with conventional polycrystalline structures, materials in nanocrystalline form exhibit large differences in saturation magnetization, density, and yield strength. In nano-ferroelectrics, nonlinear and highly anisotropic optical behavior is being explored. There are potential applications for such materials in data storage and photonic logic. Currently, a technique similar to TPCVD is used in the plasma synthesis of nano-size particles. The substrate in TPCVD is removed, the plasma is quenched, and homogeneous nucleation occurs from a supersaturated vapor. The major technical issue in this technology is

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges uniformity of the particulates with regard to size and phase, and collection without agglomeration. Reactive sputtering is also used to produce nanocrystalline materials. In view of the remarkable values for structure-related properties of these materials, it is important to develop approaches to allow scale up to large-quantity production. As with many areas of plasma processing this will require effective, reliable, and physically realistic process simulation models that can be used for control and optimization of process parameters. PLASMA CLEANING Wafers are repeatedly cleaned during microelectronic device fabrication. Partly, these cleanings are necessitated by exposure of the wafers to air and airborne particles between process steps, but cleaning is also needed because processes themselves generate contaminants that may lead to lower device yield or reduced long-term reliability. While liquid cleaning processes have been reasonably effective, they will be inadequate for future generations of electronic devices, because liquids are more difficult to filter than gases. As device dimensions shrink, it becomes increasingly difficult to effectively clean submicron structures using liquid processes; perhaps worse, it is difficult to remove residual moisture when such features are effectively wetted. Such moisture is a potential source for post-manufacture corrosion and presents a serious reliability problem. Corrosion of the wafer surface between process steps and after completion can be reduced or eliminated by dry cleaning, which removes contaminants that induce corrosion and prevents water vapor from contacting the surface. Processing in the 21st century will undoubtedly involve fewer air exposures as wafers will be transferred from process chamber to process chamber under vacuum or controlled gas ambients. The development of gaseous cleaning processes is critical to the advent of such process clustering. For these reasons, the industry is striving to eliminate as many cleaning steps as possible and substitute gaseous cleaning processes for wet processes. The nonequilibrium properties of plasmas can be exploited in removing normally involatile residues from device wafer surfaces. Today, plasma processes are used to remove native oxides before deposition and photoresist after etching. However, in the latter case, the plasma stripping process is always followed by a wet chemical cleaning to remove refractory metals and mobile ions such as sodium and potassium. Effective plasma stripping of heavily ion-implanted resist is particularly difficult. Although removal of contamination by plasma processing has been demonstrated in the laboratory, the quantitative, fundamental understanding necessary to develop equipment and processes for manufacturing is lacking. Diagnostics to determine when cleaning is complete are needed to avoid overexposure of the wafer to the plasma. Like liquid processes, plasma processes are notorious for their ability to generate particles. One of the major challenges facing the plasma processing community is to understand how particles are generated in plasmas and to develop methods that eliminate particle generation. If this can be done, the nonequilibrium nature of plasmas might be more fully exploited for in situ gas-phase wafer cleaning. LOW-PRESSURE PLASMA REACTOR TECHNOLOGY Plasma reactors and plasma processes are intimately intertwined. The geometric and electromagnetic design of plasma reactors directly influences the chemistry at device wafer surfaces; yet plasma reactors are designed empirically. We lack sufficient fundamental understanding to develop computer-aided design (CAD) tools with which we could eliminate

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges time-consuming, costly trial-and-error equipment development. By the beginning of the 21st century, we could have such tools, provided a concerted program is implemented today to acquire the necessary diagnostic data and develop the numerical methodology. Such CAD tools will enable exploitation of nonequilibrium plasma properties in etching, depositing, cleaning, and synthesizing new thin films for microelectronic device manufacture. Plasma reactor technology in the electronics industry has changed dramatically since the first application of plasma processing to photoresist stripping. Resist was stripped from 20 to 40 wafers simultaneously in a quartz tube called a barrel etcher. Radio-frequency (rf) excitation was used initially simply to avoid surface charging of insulating thin films. Since then it has been recognized that the excitation frequency can be used to tune ion energies, the degree of dissociation, and wafer attributes. In the late 1970s and early 1980s, the American-invented hexode reactor found extensive use in microelectronics factories. In this geometry, a central hexagonal-shaped electrode is rf excited using capacitive coupling, and the surrounding bell jar is grounded. Again, batches of wafers are loaded; for example, 3 wafers of 125-mm diameter can be loaded on each face of the hexagon so that 18 wafers are simultaneously processed. The planar, rf diode (see Figure 3.11) is another reactor that has been widely used in production. Batches of wafers are loaded onto one of the electrodes, either powered (the so-called reactive ion etch, or RIE, mode) or grounded (the so-called plasma etching mode). In a typical configuration, gases are injected through one of the electrodes and pumped out around the outside of the same electrode. The distinction made between RIE and plasma etching illustrates the importance of reactor design and wafer placement: in RIE, etching is usually more anisotropic but more damaging than in plasma etching. These differences do not actually result from the choice of which electrode to place the wafers on but rather from the geometry of the surrounding, grounded walls and the extent to which the plasma couples to them. All these reactor types are used today in production, but none provides an ability to control plasma parameters—electron energy, ion energy, charge density, reactant density, and so on—independently and to modify properties of individual wafers. Because these geometries are inherently asymmetrical, wafers are not processed uniformly: rates vary both from wafer to wafer and within a wafer. In the last 10 years many changes have occurred in the plasma processing equipment industry. The trends are clear and are expected to persist for the next 10 years: wafers will be processed one at a time using high-density plasma excitation that is decoupled from the wafer, and tight process control and clustered processing will be exploited in maintaining the integrity of sensitive interfaces between thin films. Single-Wafer Processing In the early 1990s, plasma processing is changing from batch operations to single-wafer operations with 150-mm-diameter wafers. By the beginning of the 21st century, single-wafer processing of 300-mm-diameter silicon wafers will be commonplace (see Figure 3.9). Larger wafer sizes are one approach to providing the additional throughput needed when one wafer instead of a batch is processed. Faster etching and deposition rates are also needed to compensate for the inherent throughput problem of single-wafer processing; this is one of the major motivations behind high-density plasma source development (see below). To fully exploit the advantages of single-wafer processing, we need scaling laws for reactor design as we increase wafer diameter from 150 mm to 300 mm. Otherwise, each time we change wafer size, we will be compelled to repeat the time-consuming and costly equipment and process development cycle. No such design tools exist today.

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Process Control Single-wafer processing is more suitable for automated wafer handling and process control, but to exploit single-wafer processing capabilities we need tools for real-time process monitoring and control. Today, there is a dearth of plasma process monitoring tools, and few processes are actively controlled. Many plasma processes drift from desired conditions and, therefore, require continual retuning. Typically, the process drifts to marginal performance before corrective measures are taken, leading to suboptimal performance, lost throughput, and decreased yield. Active feedback control is needed to improve process reliability and reduce process variability. Such control would lead directly to yield enhancement and reduction of on-line engineering for process maintenance. Currently, gas flow rates, pressures, and incident rf or microwave power are controlled independently of the surface or plasma properties. The only extent to which plasma processes are "controlled" is through endpoint detection schemes that signal the beginning of the overetch period; the process is completed at a specified time after "end-point." With automatic feedback control based on real-time detection of the plasma and wafer state, the process conditions could be maintained at the optimal conditions. Process models are required to relate diagnostic data to process control variables such as pressure, flow rates, and power and to process yield. For example, a change in wall-surface recombination could create excess isotropic etchant, e.g., atomic chlorine, that in turn increases the etching rate but decreases the etching anisotropy. To make the necessary process corrections in this scenario, the anomalously high atomic chlorine concentration must be detected and related via the process model to an unacceptable loss in pattern transfer fidelity. The corrective action will depend on the cause of the increased chlorine concentration and the coupling between plasma parameters, anisotropy, rate, selectivity, uniformity, and damage. Development of control algorithms for these applications is currently in its infancy. New Plasma Sources As feature sizes for integrated circuits continue to decrease, the limits of conventional rf plane parallel systems are rapidly being approached. Because of smaller feature widths and thinner film thicknesses, devices are more sensitive to and can tolerate less damage caused by energetic ion bombardment, ultraviolet radiation, and particulate contamination. Except for triodes, conventional plasma reactors do not separate plasma generation from charged-particle transport, and it is not feasible to tune ion energy independently and thereby minimize damage without also affecting rate, selectivity, uniformity, and anisotropy. Hence, there has been considerable interest in high-density, low-pressure, magnetized plasma sources, for which plasma generation is wholly or partly separated from the processing region. The independent control of ion energy and plasma density promises a wider window for process optimization, reduction of particulate contamination, and minimization of ion-, electron-, and photon-induced damage. The magnetic confinement and resonant mode excitation used to create high plasma and reactive particle densities are required for single-wafer applications. Magnetic fields also modify ion bombardment energies and can be used as another control parameter for process optimization. However, the application of magnetic fields makes modeling, design, and control of plasma processes significantly more challenging. MAGNETIC CONFINEMENT In some of the latest generation of etchers used on production lines today, a uniform direct-current magnetic field is applied parallel to the wafer surface to raise the plasma density and reduce the ion bombardment energy. To achieve the required time-averaged plasma uniformity across the wafer surface, the field direction is rotated electrically with a period short

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges with respect to the processing time. Most advanced plasma reactor development in the United States is focused on such magnetically enhanced reactive ion etching (MERIE). In Japan, on the other hand, efforts are widely focused on electron cyclotron resonance (ECR) sources (see Figure 3.7). In these systems, one or more circular coils generate a nonuniform, axisymmetric magnetic field inside a source chamber, and 100 to 5000 watts of 2.45-GHz microwave power is absorbed at ECR within the chamber producing a high-density plasma. Other high-density, magnetized reactors include distributed ECRs (pioneered in France), helicons (pioneered in Australia), and surface wave sources (pioneered in Canada and Europe). Other high-density sources receiving attention in the United States are helical resonators and inductive rf sources. Uniformity of the plasma and radical fluxes to the wafer are critical issues. To control and enhance uniformity, permanent magnets can be arranged around the process chamber to create a magnetic-field-free volume where the wafers are processed. Alternatively, an additional electromagnetic coil can be placed near the wafer and be operated either in a magnetic mirror or magnetic cusp mode. The overall magnetic configuration can be complicated; however, the configuration and the plasma response are accessible to measurement and modeling for the design of processes. Each of these sources and downstream configurations has its own advantages and disadvantages, and it is likely that no one configuration will be used for all processes. Until we attain a detailed understanding of the role that source geometry and electromagnetic design play in materials processing, the best reactor choice for a given process will not be obvious and will necessarily be based on empirical, trial-and-error experimentation. Figure 3.15 illustrates the dilemma facing semiconductor manufacturers today in choosing the plasma equipment necessary to make next-generation devices. Buying and evaluating each of the choices are prohibitively expensive. DOWNSTREAM PROCESSING The device wafer can be placed either inside the source or in a downstream process chamber. In either case, an independent rf bias voltage can be applied to tune ion energy and flux independently from plasma generation. For example, in photoresist stripping, the elimination of ion bombardment and photon flux is desirable, and the downstream configuration is preferred. In PECVD, chemical precursors can be introduced downstream of the plasma to control the composition of species impinging on the wafer surface. Remote plasma processes are less dependent on wafer state and, therefore, are more compatible with robust, flexible manufacturing (see below) in which different device codes can be processed without reengineering the process each time. MODULATED PROCESSING Modulated plasma processing is a hybrid approach between remote and direct processing that has to date been implemented in only rudimentary ways. For example, during the over-etch period, the gas chemistry may be switched or modulated to improve selectivity at the expense of anisotropy. Japanese researchers have led this hybrid approach in application to anisotropic etching, whereby an etchant and an etch-inhibitor are alternately introduced into the plasma. Plasma power modulation also appears to be an effective means of controlling particulate generation by periodically extracting small, negative particle precursors. A related method developed in Japan is so-called digital plasma processing, in which one atomic layer is etched or deposited at a time. In deposition, digital plasma processing is like molecular beam epitaxy except that the growth need not be epitaxial. The technique usually

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Figure 3.15 Semiconductor manufacturers are faced with the dilemma of choosing plasma process  equipment from a wide variety of configurations but without fundamental understanding of how  designs will affect processes and meet device fabrication specifications. Since the choices are  not obvious but are critical, the evaluation process will proceed by costly, time-consuming trial  and error. A subset of the available choices are shown here, going clockwise from the upper left:  distributed electron cyclotron resonance, magnetically enhanced reactive ion etcher, planar  magnetron, electron cyclotron resonance, helicon, helical resonator, magnetically confined  reactor, and triode. (Based on data from D. L. Flamm, 1991, "Trends in Plasma Sources and  Etching," Solid State Technology, March, p. 47.) employs sequential process steps, one of which, say an adsorption step, is kinetically limited to one atomic layer. The main virtue of this technique is insensitivity to nonuniformities in process conditions; e.g., the growth rate becomes insensitive to gas flow because of the kinetic limitation to adsorption of gas onto the surface. This allows precise control over the thickness of the material deposited or removed. It also allows atomically sharp interface fabrication, thin-layer deposition, and doping profiles. The main disadvantage of the technique has been low throughput. Potential applications for this technique include fabrication of very narrow quantum well structures, surface cleaning and preparation, and etching where extreme selectivity is required.

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Clustered Processing Microelectronic device wafers are processed in clean rooms to minimize ambient exposure to particulate contamination. As device dimensions shrink and we fast approach the practical and economic limits of clean room technology, particulate contamination becomes an even more serious problem. For example, 0.1-µm-diameter particles that were innocuous for 1.0-µm-linewidth device structures become ''killer'' defects for 0.3-µm-linewidth devices. To minimize particulate contamination and preserve the integrity of thin-film interfaces, it is desirable to link processes together. A cluster tool consists of a group of process chambers arranged about a wafer handler that passes wafers from chamber to chamber. Thus, wafers can be transferred from reactor to reactor without being exposed to and contaminated by the ambient. Today, plasma cluster tools are used in manufacturing primarily to increase throughput for single-wafer processes, etch multiple layers sequentially, or etch and deposit sequentially for planarization. The development of gaseous cleaning processes to remove photoresist, native oxides, process damage, and wafer contaminants is essential to fully realize the benefits of clustering. In addition, reliable, robust plasma etching and deposition processes with real-time, in situ diagnostics are needed to avoid wafer inspection between processes. A major impediment to development of cluster tools is their cost. In 1990, a three-chamber cluster tool with wafer load chamber and central wafer handler typically cost $1 million to $2 million. Costs will continue to escalate as cluster tools and their process chambers become even more sophisticated. However, the advantages of process clustering compared to single-chamber processing are likely to outweigh the high cost of ownership. THERMAL PLASMA REACTOR TECHNOLOGY Thermal plasma generators that are being used in the electronics industry are plasma spray torches and TPCVD reactors. Direct current plasma spray torches consist typically of a rod cathode with a conical tip inserted into the converging section of a nozzle anode. The cathode material is usually tungsten with a low-work-function material such as thorium oxide added to increase thermionic emission. The cylindrical anode is usually made of copper and is water cooled. The plasma gas is introduced at the base of the cathode, usually tangentially to provide a swirl to stabilize the cathode attachment and to move the anode attachment to distribute the heating by the arc attachment. The plasma exits the anode nozzle with peak temperatures between 12,000 K and 16,000 K, and peak velocities between 500 m/s and 1,000 m/s. The most frequently used plasma gases are argon, argon-helium, or argon-hydrogen mixtures. A typical nozzle diameter is 6 mm, the arc length is on the order of 20 mm, and power levels range from 40 to 80 kilowatts. The powder is introduced into the plasma gas flow either through a hole in the anode wall or through an injection tube in front of the nozzle exit. The particles are accelerated and heated by the plasma gas and then rapidly solidified upon hitting the substrate. Thick films can be rapidly deposited with close to the theoretical density of almost any metal or metal alloy, and of many ceramic materials, including high-temperature superconductors. The major issues in plasma spraying are the reliability of the coating process and the dependence on powder characteristics. This translates into the plasma science issues of (1) understanding the arc anode attachment instability, (2) controlling the plasma jet fluid dynamics, and (3) being able to describe the plasma-particle interaction. Major recent developments are the low-pressure plasma spray process in which the plasma jet exits into an evacuated chamber with supersonic velocities; the development of new nozzle geometries to better control the atmospheric pressure plasma jet; and reactive plasma spraying, in which the metal alloy or the ceramic to be deposited is formed by reacting the spray powders either with powders of a different type or with a gas environment. Another development makes use of radio frequency-induction plasma torches to heat the powders. In rf plasma spraying, the

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges gas and the particle velocities as well as the plasma temperatures are lower than in direct-current spray guns, but the longer particle heating times will assure good melting. Figure 3.16 Schematic illustration of a thermal plasma chemical  vapor deposition torch used for depositing electronic materials. There are several designs of plasma generators for TPCVD (Figure 3.16). In this process, a good mixing of the vapor phase reactants with the hot plasma is necessary to provide a uniform vapor mixture in front of the substrate. The substrate has to be in intimate contact with the plasma and has to be cooled. This way a nonequilibrium boundary layer between the plasma and the substrate can be maintained without nucleation occurring in the boundary layer. Since the plasma is at or close to atmospheric pressure, the deposition precursor densities and hence the deposition rates can be significantly higher than with low-pressure deposition processes. Radio frequency-induction plasma torches have been probably the most favored plasma-generation method for TPCVD, because they provide a plasma flow with moderate velocity and moderate energy density and uniformity over a larger surface area. However, there are also several DC TPCVD systems in use in which the uniform mixing of the reactant vapors is attained in different ways, for example in a high-temperature flow channel, or by use of multiple torches similar to plasma spray torches. The major technological issue in TPCVD is control of the conditions in the boundary layer in front of the substrate. The high-temperature chemical kinetics proceeding in this boundary layer are little understood. TOWARD FLEXIBLE MICROELECTRONICS MANUFACTURING Custom-designed and custom-manufactured chips, so-called application-specific integrated circuits (ASICs), account for more than 20 percent of worldwide chip production today. Between now and 1994, ASIC production is expected to grow at a compound annual rate of 16 percent. In 1989, U.S. companies accounted for 52 percent of worldwide ASIC shipments (M. J. Boss and A. Prophet, 1989, "U.S. ASIC Supplier at the Crossroads," Solid State Technology, July, p. 33). Unlike DRAM production, in which large volumes of identical chips are manufactured for each design rule generation, ASIC device codes are fabricated to customer specifications and are manufactured in small volumes. Therefore, the ASIC manufacturer cannot afford to invest heavily in new processes and new processing equipment each time a new order is placed. The future ASIC market will belong to the flexible manufacturer. Flexible manufacturing is the fabrication of integrated circuits using a common set of processes and equipment to manufacture many different circuit designs. To achieve this goal, it is imperative to understand how rate, uniformity, anisotropy, selectivity, and damage depend on microstructure and film composition. It is not likely that processes will be made independent of microstructure or film composition; therefore, processes will have to be pretuned for each device wafer code.

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges Figure 3.17 Schematic illustration of future flexible plasma processing with real-time process control.  Fundamental studies are needed to provide in situ monitors and plasma process models  that relate diagnostic input to wafer attributes and wafer attributes to control variables. Consider the scheme shown in Figure 3.17. Each wafer is marked and its process routing determined by a "smart" scheduler. Based on previous process history and device design (microstructure), each process step is pretuned to the predicted optimal settings. Diagnostics are used to monitor the process in real time, to provide input for feedback control, and to terminate the process if it diverges from specifications. After processing is complete, a fraction of the wafers are automatically inspected to assure process integrity and to refine further the process model. To incorporate plasma processes into such a flexible scheme, diagnostics are needed to monitor both the plasma and the wafer states. Process models must be developed: these might be expert-type systems based on fundamental insights and scaling laws, or perhaps neural network controllers where the complex plasma-surface relationships have been "learned" by a machine. FINDINGS AND CONCLUSIONS The U.S. electronics industry is a vital part of the American economy and an integral part of our national defense. Plasma processing is a keystone in this industry. In the manufacture of integrated circuits, plasma etching is the only economically viable method for high-fidelity transfer of microscopic patterns. Similarly, plasmas are used extensively for depositing insulating and conducting films at temperatures low enough to avoid compromising device performance. Plasmas are also used for cleaning and modifying surfaces. As microelectronic device dimensions continue to shrink during the next 10 years, plasma processing will be used with increasing frequency, while greater demands will be placed on plasma processes. The successful fabrication of future generations of integrated circuits will

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Plasma Processing of Materials: Scientific Opportunities and Technological Challenges require dramatic improvements in the anisotropy, selectivity, and uniformity of etching; improved planarization and conformality in deposition; new materials to meet device performance and reliability requirements; and reduced process damage and contamination. To meet these challenges, new processes and new reactors are needed. Plasma processes in use today have been developed using a combination of intuition, empiricism, and statistical optimization. Design tools such as numerical simulation codes or even expert systems do not exist for plasma processes because of fundamental gaps in understanding. With the unprecedented demands now being placed on plasma processes, it is unlikely that the traditional approaches used in process development will continue to satisfy our needs. Tools are needed to relate process variables to wafer attributes, modify existing processes, and design new processes. Plasma reactor design is intimately intertwined with plasma processes, but we again lack computer-aided design tools for new plasma reactor design. We are also unable to transfer processes from one plasma reactor to another or to scale processes from a small to a large plasma reactor. Until we understand how geometry and electromagnetic design affect material properties, the choice of reactor for a given process will not be obvious. Without physical understanding leading to computer-aided design tools, only costly empirical, trial-and-error experimentation will be available to provide the necessary guidance. The United States has lost the lead in new plasma reactor and process development, and the health of the American electronics industry is seriously threatened as a consequence. One reason for this precarious situation is the relationships between chip manufacturers and their processing equipment suppliers. In Japan, most equipment development occurs by collaboration between chip manufacturers and equipment vendors. In the United States, on the other hand, semiconductor processing equipment suppliers are small and typically unaligned with chip manufacturers. As a result, critical process information is not efficiently fed back to equipment builders, and R&D funding for next-generation processing equipment is strained. As custom-designed, custom-manufactured chips (application-specific integrated circuits, ASICs) gain a larger market share, the future microelectronics market will no longer be dominated by memory chips. But customization at low cost means that the ASIC manufacturer cannot afford to invest heavily in new processes and new processing equipment each time a new order is placed. The future ASIC market will belong to the flexible manufacturer who uses a common set of processes and equipment to manufacture many different circuit designs. Such flexibility in processing will result only from real understanding of processes and reactors.