Skip to main content

Currently Skimming:

Panel 2: Current Japanese Partnerships: Selete and ASET
Pages 122-136

The Chapter Skim interface presents what we've algorithmically identified as the most significant single chunk of text within every page in the chapter.
Select key terms on the right to highlight them within pages of the chapter.


From page 122...
... The company was established in 1996, and its shareholders include Fujitsu, Hitachi, Matsushita, Mitsubishi, NEC, Oki, Rohm, Sanyo, Sharp, Sony, and Toshiba the major electronics companies of Japan. Its clients include all of those shareholders plus the Korean firm Samsung, and Seiko Epson.
From page 123...
... Collaboration Collaboration with Tool Suppliers Selete worked in collaboration with the tool suppliers. In this work Selete's first responsibility was to set up tool performance metrics, including performance metrics for process, reliability, and productivity.
From page 124...
... The partnership is trying to develop unified equipment performance metrics and to assist joint evaluation and data exchange. It has published a second edition of the "Unified Equipment Performance Metrics for 130-nm Technology." The partnership is also developing a unified interface for equipment or AMHS and CIM communication.
From page 125...
... Selete will carry out device process technology, while design technology will be carried out by the STARC. He concluded by saying that Project ASCA has been undertaken in collaboration with equipment and materials suppliers, ASET, research institutes, universities, and overseas consortia.
From page 126...
... And while most research consortia can get tax incentives for research equipment, this is not the case with ASET, because the equipment it uses is owned by NEDO. Finally, a research consortium usually terminates after the authorized research period has expired, but ASET, which was supposed to end in 2000, was extended for three more years.
From page 127...
... A few projects include joint research between universities and national laboratories. ASET's head office is in Tokyo; its five research centers are distributed around the country, along with some branch offices, satellite labs, and university partners.
From page 129...
... The first three were the original members of ASET, and Merck KGaA joined ASET soon after. Intel and Samsung joined the EUV lithography research, and Samsung also participated in the PFC alternative technology research.
From page 130...
... MIRAI is a joint program between the newly reorganized national laboratory, Advanced Semiconductor Research Center (ASRC) of the National Institute of Advanced Industrial Science and Technology (AIST)
From page 131...
... (See Figure 7.) SIRIJ planned and proposed joint research systems with Japanese universities and industry, and STARC (Semiconductor Technology Academic Research Center)
From page 132...
... SIRIJ planned and organized a new committee called STRJ, the Semiconductor Technology Roadmap Committee of Japan, in 1999. Revitalizing the Industry The final step for SIRIJ was to organize a team to study the needs of the industry for the new century with the objective of revitalizing the Japanese semiconductor industry.
From page 133...
... Unno said was "not bad, but maybe an easy path." Turning to ASET, he mentioned the interim evaluation of laboratories performed in 2000 by both technical committee members and ASET department managers. Illustrating the results with humorous cartoon figures, he summarized that EUVL and environmental technologies did well, PXL did fairly well, plasma needed help, and cleaning needed "a lot of help." UNIVERSITY RESEARCH CENTERS FOR SILICON TECHNOLOGY Masataka Hirose Hiroshima University Government-sponsored Research Dr.
From page 134...
... Research projects include advanced metrology for high-k gate dielectrics, modeling of gate tunnel leakage current, 30-nm gate-length MOSFETs,2i and Cu drift in low-k dielectrics. To illustrate one focus of the work at this center he showed a graph of a direct tunnel regime and a second graph of a 30-nm gate length MOSFET, with drain voltage plotted against drain current.
From page 135...
... He said that good balance between applied science and fundamental research work will be one of the important missions of the university research involvement, which is a basis for startups, new ideas for the future, device technology, and material technology. Funding Levels at Universities Genda Hu of Taiwan Semiconductor Manufacturing Company asked Professor Hirose about the general funding level of the three university programs.
From page 136...
... Dr. Masuhara said that the total number of students graduating from electrical engineering programs had not fallen in Japan, but he said that several years ago a study of expertise needed by industry revealed a large gap.


This material may be derived from roughly machine-read images, and so is provided only to facilitate research.
More information on Chapter Skim is available.