Energy-Efficient Technologies for the Dismounted Soldier (1997) / Chapter Skim
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4 Low Power Electronics and Design
4 Low Power Electronics and Design
Pages 46-64
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From page 46... ...
The growing demand for computing, along with declining costs, has led to faster, smaller, more reliable integrated circuits that require less power. The technology accompanying these advances can be incorporated into the soldier's electronics systems to make them more furlctional and to reduce power requirements.
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From page 47... ...
to field technology in phase with industry. The committee estimates that if the Army upgraded technology at a pace comparable with the pace of industry, it could reduce power requirements by more than a factor of 30 for any given function by migrating from 5V operation to 0.9 V operation in 2004.
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From page 48... ...
Therefore, a simply stated goal for optimizing performance and reducing the power requirements is to maximize the ratio
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From page 49... ...
Power loss is minimized by using technologies that allow selecting the transistor threshold voltages, tailoring the transistor drive current to the Toad, and at the same time minimizing the leakage current. The optimum threshold voltage must balance improvements of the drive current at low supply voltage operation with control of leakage currents.
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From page 50... ...
Integrated circuit designs have been demonstrated using I-,um channel lengths and operating at 900 MHz; 0.6-pm channel length devices can operate in the 2.4 GHz range. Scaling feature sizes to 0.35 rim or less will make possible operational frequencies of 5 GHz.
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From page 51... ...
Examples of Circuit Design Actual circuit designs employ a variety of techniques to minimize power requirements at the system level. For example, to achieve maximum energy efficiency for mobile electronics, a number of voltage levels are usually required from a fixed battery source.
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From page 52... ...
The logic level design strategy for power savings optimizes the circuit to obtain low switching activity for nodes that drive large capacitive loads. Power savings can also be obtained during logic synthesis by considering dynamic power dissipation involved with short circuit currents and slew rates, using accurate delay modeling, and matching equivalent signal pins within a specific gate library to minimize capacitive charging loads.
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From page 53... ...
Although many of the cells are manually designed to optimize compact layouts, interactive design tools can be used to simplify layout and analysis for individual logic cells. Floor planning and circuit partitioning can be used to optimize the layout to reduce power requirements by collecting various circuit and logic functions to minimize off-block capacitance and keep the high switching activity nets within the same block.
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From page 54... ...
The reference to performance in Table 4-2 reflects the industry's desire to increase the operating frequency and number of circuit functions as transistor sizes decrease, which would lead to an increase in the total circuit power if adequate cooling methods can be used. Although the emphasis is on minimum feature size for the transistor as a function of time, the accompanying decreases in operating voltage and capacitance lead to an overall decrease in the power requirement for a specific circuit function while performance remains constant.
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From page 55... ...
Related disciplines, such as metrology, modeling and simulation, electronic materials, standards, contamination-free manufacturing (CFM) , and quality and reliability, were included as "cross-cutting technologies." Although the primary measures of progress have been decreases in minimum feature size and increases in transistor density, smaller feature sizes have led to related changes in fabrication technology, producing circuit operation at lower voltages and decreases in circuit capacitances, which have led to decreases in
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From page 56... ...
with an attendant decrease in power related to driving numerous off-chip capacitances associated with interfacing integrated circuits. Even with the primary emphasis of the NTRS on minimum feature size, the related reductions in power requirements for a fixed level of performance and the increasing levels of device integration would tend to reduce the power requirements of electronics for the dismounted soldier.
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From page 57... ...
The road map also provides systems designers with a schedule for technology insertion in planning new products. The Army can use NTRS near-term projections to determine the availability of technology for implementing low power circuit designs in defense electronics systems.
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From page 58... ...
government Investment has decreased dramatically in recent years. , ~ To ensure that low power technology for the soldier's electronics is available, DARPA should increase support for advanced technology, ranging from research on new electrical devices and circuits to improved manufacturing methods and the development of more efficient software design tools.
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From page 59... ...
Even though the circuit voltage may plateau in the 0.9 V range, continued improvements in transistor density and performance through other technological advances are expected to support lower power integrated circuits. Although the industry commitment to remaining on the NTRS is strong, extensive resources must still be expended each year to advance the technology.
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From page 60... ...
Although the Army's low power systems may not require the maximum device density or the high performance that accompanies the decrease in design rules or minimum geometries, the lower voltages and capacitances supported by the decreasing device geometries and interconnects and the ability to tailor individual transistor drive currents are expected to yield reductions in both integrated circuit and system power requirements. Future opportunities for low power electronics or gigascale integration will be governed by a hierarchy of theoretical and practical limits.
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From page 61... ...
The prospects of scaling future species of metal-oxide semiconductor field effect transistor (MOSFETs) to 25 rim minimum feature sizes (and perhaps beyond)
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From page 62... ...
DARPA Low Power Electronics Program The stated goal of DARPA's program was to develop a mainstream technology base to enable a new class of electronic systems that dissipate less than ~ percent of the power of systems based on conventional technology. The program was divided into two sections: circuit architecture and power management; and, materials and device technology.
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From page 63... ...
To keep up with industry trends in reducing power for mobile functions, Army contractors will need to change their system, subsystem, and integrated circuit design methods. Instead of designing for the smallest chip area or the highest speed, they should design for minimum power requirements.
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From page 64... ...
Although private industry may have software development tools that minimize power requirements, the Army may have to develop new tools to compile application software to minimize power for military applications. The general trend in mission planning has been to provide general purpose capabilities for each soldier.
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